Question 1
Difficulty: medium
Can you walk me through your verification strategy for a new RTL block from spec to sign-off?
Sample answer
My approach starts with understanding the spec deeply enough to turn it into a measurable verification plan. I usually begin by reviewing the architecture, identifying key features, corner cases, assumptions, and any ambiguous requirements that need clarification early. From there, I define coverage goals, stimulus needs, and the mix of directed and constrained-random tests that will give good functional depth. I also map assertions to critical protocol and state-machine behavior so we can catch issues quickly and localize failures. As the block stabilizes, I keep the plan aligned with implementation changes and coverage gaps, and I use regressions to drive closure rather than just test execution. I like to track progress with a clear checklist: requirements coverage, assertion pass rate, functional coverage, code coverage, and outstanding bugs. The main goal for me is not just to run tests, but to prove the design behaves correctly under realistic and stressful conditions.
Question 2
Difficulty: medium
Describe a time you found a difficult bug in simulation. How did you isolate it?
Sample answer
In one project, we had a failure that only appeared after a long random regression run, and it was not reproducible with the obvious directed tests. I started by reducing the failing seed and capturing the waveform around the first point of divergence rather than the final crash, because the root cause was likely earlier in the sequence. Then I compared the transaction log against the expected protocol behavior and noticed an illegal ordering of handshakes after a reset exit sequence. I suspected either the scoreboard model or the design, so I added targeted assertions and a small debug test to reproduce the behavior in a few hundred cycles. That showed the design was accepting a request during a state transition window that was not covered in the spec. I documented the issue clearly, including the exact stimulus, timing, and observed mismatch, which helped the RTL team fix it quickly. The key for me was staying systematic and narrowing the problem without assuming the first visible symptom was the real bug.
Question 3
Difficulty: easy
How do you decide between directed tests and constrained-random verification?
Sample answer
I usually use both, but for different reasons. Directed tests are valuable when I need to validate a known scenario, confirm a bug fix, or hit a precise corner case that is hard to reach randomly. They are also useful early in the project when the environment is still being brought up and we need quick sanity checks. Constrained-random verification becomes more powerful once the interface and environment are stable, because it can explore combinations of valid and borderline stimuli that humans are less likely to think of. I like to bias the random space toward high-risk areas such as resets, back-to-back transactions, resource contention, and error handling. In practice, I treat directed tests as precision tools and constrained-random as coverage accelerators. The best results usually come from combining them: directed tests to prove specific behavior, and random tests to uncover interaction bugs and fill coverage holes that are easy to miss manually.
Question 4
Difficulty: medium
What is functional coverage, and how do you use it to drive closure?
Sample answer
Functional coverage is how I measure whether the verification environment has exercised the meaningful behavior of the design, not just whether code was executed. I use it to confirm that the scenarios the product actually cares about have been hit: state transitions, protocol sequences, boundary values, error responses, mode combinations, and any feature-specific conditions from the spec. I start by defining coverage points that reflect requirements, then I look for cross coverage only where it adds real value rather than creating noise. Once the regression is running, I review coverage trends to find blind spots and decide whether I need new tests, better constraints, or model adjustments. I do not treat 100% coverage as a goal by itself; instead, I ask whether the remaining holes matter functionally. If a hole is real, I close it with targeted stimulus or an assertion. If it is irrelevant, I document why it can be waived. That keeps closure disciplined and meaningful.
Question 5
Difficulty: medium
How do you write good SystemVerilog assertions, and where do they help most?
Sample answer
I write assertions to capture protocol rules, safety conditions, and timing expectations that should never be violated in normal operation. The best assertions are specific enough to catch a real design issue but not so rigid that they create false failures during legitimate behavior. I usually place them around interface handshakes, reset behavior, state transitions, mutual exclusions, and data validity checks. For example, if a request must be acknowledged within a certain number of cycles, I will express that in a way that clearly ties the request event to the response window. I also like assertions for debugging because they often pinpoint the moment something goes wrong instead of forcing you to infer it from scoreboard mismatches later. In addition, they can serve as living documentation of the spec. I review them carefully against the design intent and expected latency, especially when there are pipeline stages or backpressure conditions, because that is where poorly written assertions can become misleading.
Question 6
Difficulty: hard
Tell me about a time you disagreed with a designer or architect about a bug or requirement. How did you handle it?
Sample answer
I had a case where a transaction ordering issue appeared to be a verification failure, but the designer believed the behavior was legal. Instead of turning it into an argument, I asked for a walk-through of the spec section and the internal state machine, then I recreated the sequence with a minimal test case. That helped us separate what the implementation was doing from what the requirement actually said. It turned out the spec wording was ambiguous around a timing window after arbitration, so both interpretations seemed reasonable at first. I documented the exact sequence, the observed behavior, and the ambiguity in the requirement, then proposed a clarifying statement that both sides could agree on. In the end, the RTL was updated slightly and the spec was improved, which prevented future confusion. I think the best way to handle disagreement in verification is to stay evidence-driven, keep the conversation technical, and focus on product correctness rather than proving who is right.
Question 7
Difficulty: hard
How would you verify a new AXI-like or handshake-based interface?
Sample answer
For a handshake-based interface, I would start by identifying the protocol rules that must always hold: valid/ready behavior, ordering guarantees, payload stability while stalled, response timing, and reset interactions. Then I would build a reusable agent with a driver, monitor, and scoreboard so I can generate realistic traffic and check observed transactions against expected behavior. I would add assertions for the most critical rules, especially those that are easy to violate under backpressure or during pipeline transitions. On top of that, I would create tests for simple single-transaction cases, burst traffic, out-of-order stress if allowed, stall injection, reset during activity, and error response handling. Coverage would focus on transaction types, burst lengths, address alignment, response codes, and corner cases like zero-wait and maximum-stall conditions. I would also look for deadlock or livelock risks by deliberately varying request rates and ready behavior. The main objective is to prove both correctness and robustness, not just basic connectivity.
Question 8
Difficulty: medium
What steps do you take when a regression suddenly fails after a change in the environment or testbench?
Sample answer
When a regression fails after an environment change, I first establish whether the failure is deterministic and whether it affects a small set of tests or many tests. That gives me a clue about whether the issue is in the DUT, the testbench, or the configuration. Then I compare the failing setup against the last known good run, focusing on changes in constraints, timing, reset handling, build options, and model behavior. If possible, I isolate the failure by rerunning the same seed with the old environment and then with the new one. I also check whether the scoreboard, reference model, or transaction monitor has changed in a way that could create a false failure. Once I narrow it down, I create a minimal reproduction and validate the root cause with debug logs or assertions. I try to keep the process structured so that the team can quickly tell whether the regression broke because of an environment issue or because the new change exposed a real design problem.
Question 9
Difficulty: easy
How do you ensure your verification environment is maintainable and reusable across projects?
Sample answer
I try to build environments with reuse in mind from the beginning, not as an afterthought. That means keeping the architecture modular, separating protocol-specific logic from test intent, and defining clean interfaces between agents, scoreboards, and configuration layers. I prefer parameterized components and common utilities for tasks like logging, reset handling, sequence control, and result reporting. When I write sequences or tests, I keep them focused on behavior rather than hardcoding implementation details, so they can survive design revisions. I also document assumptions clearly, because reusable code becomes brittle when only one person understands it. Another habit I value is regular cleanup: removing duplicated logic, tightening naming, and making sure coverage points and checks remain aligned with the latest spec. Reuse matters to me because verification teams often move from one block to another under tight schedules. A maintainable environment shortens bring-up time, reduces debug cost, and makes it easier for other engineers to contribute without breaking the structure.
Question 10
Difficulty: medium
Suppose coverage is stuck at 92% near the end of the project. What would you do?
Sample answer
If coverage is stuck late in the project, I would first find out whether the remaining gap is a real verification hole or just low-value coverage. I would review the uncovered bins, crosses, and code areas and group them by importance: must-hit requirements, reasonable corner cases, and items that might be unreachable or unnecessary. For the important gaps, I would trace back to the stimulus and determine whether the existing tests simply do not drive that behavior or whether the constraints are preventing access. In many cases, the fix is to add a targeted test, relax a constraint, or create a scenario with the right setup sequence. If the uncovered area is truly unreachable or not relevant to product intent, I would gather evidence and document the waiver clearly. I would also make sure the team is not using coverage percentage alone as a success metric. At the end of a project, quality and risk reduction matter more than a number, so I focus on closing meaningful gaps efficiently.
